Many modern integrated circuits include a large number of variable digital delay lines. A variable digital delay line usually includes a sequence of delay units (also referred to as taps) as well as a control circuit that determines which delay units should participate in delaying a signal. The delay of each tap can depend upon various parameters such as manufacturing process variation, temperature and the like.
The tap delay continuously decreases and its accuracy becomes more significant, as modern integrated circuits operate at higher operational frequencies. This delay decrement makes external (out of IC) tap testing that is based upon evaluation of signals delayed by a tap, more susceptible to communication timing errors, phase noises and the like.
There is a growing need to provide robust and reliable methods and devices for testing variable digital delay lines.